Project 5: Functional Simulator


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Project 5

Learn how to develop a functional simulator


Finish the Java implementation of a functional simulator for a simple
instruction set architecture.

The instruction set architecture:

Our architecture has:

– 4 8-bit registers R0, R1, R2, and R3
– an 8-bit PC
– an 8-bit result register

All registers are initialized to 0.

Instructions are either 1 or 2 byte long. Here are the defined instructions:

binary encoding instruction description

00000000 halt stop the processor

000011dd jle Rdd branch to the address in Rdd if the
value in the result register is less
than or equal to zero

000110dd outch Rdd print the character whose ASCII
code is in Rdd

000111dd show Rdd print the value in Rdd as both
hexadecimal and decimal integer

001000dd vvvvvvvv movi vvvvvvvv,Rdd move the 8 bit immediate value
vvvvvvvv to Rdd

1000ssdd add Rss,Rdd add the contents of Rss and Rdd and
store the result in Rdd

1011ssdd cmp Rss,Rdd subtract the contents of Rss from Rdd
and store the result in the result

The simulator terminates if it encounters an invalid instruction

To compile:


To run:

make test


src/cs429/ The main program (don’t change it)
test.ok Expected output (don’t change it)
src/cs429/ The simulator
test.out The output produced by running “make test”

PlaceholderProject 5: Functional Simulator
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